The scope of this study is to examine the efforts required for a straight “port” of an existing bulk CMOS design to FD-SOI at the same node. The objective would be to get value from FD-SOI for a modest redesign effort – even if this means not necessarily taking maximum advantage of the potentialities of FD-SOI. The focus is on FD-SOI with Ultra-Thin Buried Oxide. This document intends to be sufficiently generic to be applicable to different possible implementations of the FD-SOI technology by foundries.
SOI Consortium, bulk CMOS design, Ultra-Thin Buried Oxide, FD-SOI technology