High Speed PCB Layout: Physical Design Issues of High-Speed Interfaces

September 19, 2012 // By Mentor Graphics
Moore's law, applied to data rates, has pushed PCB circuits so fast that the layout becomes part of the circuit. In designs such as DDR3 and PCIe, the fastest memory and high-speed serial performance comes with very specific physical layout requirements that are not obvious. Unless you are thinking like an RF designer, there are many unexpected challenges to a successful high-speed layout. A point-to-point differential pair doesn't mean the layout is dirt easy; it means the design challenges have transformed. Keeping in mind that the board is part of the electrical design, we will outline the important high-speed considerations and efficient ways to account for them in high-speed PCB layouts.
Mentor graphics, PCB Design, High Speed, Gbps