Optimizing LPDDR4 performance and power with multi-channel architectures

March 15, 2016 // By Marc Greenberg, Synopsys
LPDDR4 offers great bandwidth in a physically small PCB area and volume; up to 25.6GByte/s of bandwidth at a 3,200 Mbps data rate from a single 15mm by 15mm LPDDR4 package when two dies are packaged together. LPDDR4 builds on the success of LPDDR2 and LPDDR3 by adding features and introducing a major architectural change. This white paper discusses why designers are selecting LPDDR4, how to handle 2-die and 4-die packages with multi-channel connections, the advantages of sharing channels through system-on-chip (SoC) partitioning, and how to optimize channels for the lowest power consumption.