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Actel blends single-chip mix of ARM core, FPGA and analogue

In its latest programmable silicon product line, SmartFusion, Actel has combined programmable logic, programmable analogue functions, and a "hard" (fully diffused) ARM Cortex-M3 processor core. With this architecture, Actel aims to provide designers of small-to-medium-size embedded systems with the means to implement a singlechip, SoC (System-on-Chip) design at an economic price point. The devices extend the concept of the mixed-signal FPGA that Actel embodies in its existing Fusion product line. You might use a SmartFusion chip, the company suggests, for designs in areas such as system management, power management, motor control, other industrial-automation applications, or many display-centred products.

As a fl ash-based device, SmartFusion has non-volatile storage of both FPGA confi guration data and processor code on-chip; this means that the chip is live at power-up and is also the basis on which Actel claims a high degree of design security and IP protection. As there is no external configuration memory, the IP (intellectual property) of the design has a high degree of immunity to unauthorised interception. Additionally, the fl ash memory requires a silicon process that uses relatively high on-chip voltages (for programming), which also makes available higher voltage devices for linear circuitry. Design security also benefi ts from a feature called FlashLock, which prevents access to the confi guration memory once programmed; and from AES encryption of the confi guration data.

The M3 is a complete Cortex microcontroller, with a full peripheral set, that will run at 100 MHz. It incorporates a multi-layer AHB communications matrix with up to 16-Gbps throughput; 10/100 Ethernet MAC with an RMII interface; two sets of interfaces comprising SPI, I2C, and UART, and two 32-bit timers; up to 512 kbytes of fl ash memory and 64 kbytes of SRAM; and an EMC (external memory controller) plus eightchannel DMA controller. The FPGA array is, similarly, a fullfunction block using the same device structures as Actel’s ProASIC 3 chips. Add fullyprogrammable analogue functions that are high-voltagecapable, and you can, the company says, design exactly the system chip you need, without compromises.

Actel builds the chips on a 130-nm CMOS process and offers FPGA logic densities ranging from 60K to 500K system gates, with 350-MHz performance and up to 204 I/Os. This combination enables the integration of existing functions from other devices, reducing board space and power consumption of the overall system.

The analogue functions include ADCs and DACs with 1% accuracy; up to three 12-bit ADCs that will run at up to 600k samples/sec, and as many as three 12-bit fi rst-order sigma-delta DACs; up to ten 50-nsec high-speed comparators; and a selection of temperature, voltage and current monitors. In particular, you can directly measure and scale external sense-resistor voltage-drop values, to acquire current data in applications such as motor control.

The analogue functions are not simply linear-circuit tiles; they are grouped under the control of a block that Actel terms ACE (Analog Compute Engine). Despite having an on-board Cortex-M3 core, for many low-level tasks you might not need to wake the CPU: the ACE can carry out sample sequencing and signal pre-processing. For example, the device might acquire a sample, scale it, convert it to digital values and route it to memory without ever using the M3 core.

SmartFusion A2F200 devices (200k FPGA system gates) are in volume production, with A2F500 (500K gates) and A2F060 (60K gates) scheduled for later in 2010. You can design now in the Libero free-download package: this includes RTOS and code-development support for standard ARM tool chains), as well as a graphical system-confi guration tool suite. There are development platforms at $99 and $999 price points.

Actel, www.actel.com/products/SmartFusion/default.aspx.