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Is there anyone there? Probably not. 12/3/2010
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With the latest member of its Cortex family of IP processor cores, the M0, ARM has made a further move to capture the “low” end of the microcontroller market. In particular, ARM envisages that silicon vendors will build it into low-power and mixedsignal designs. M0, the company says, offers 32-bit performance in the footprint of a 16-bit processor, adding a further incentive to 8-bit MCU developers to “skip” 16-bit devices and move directly to 32-bit, a trend that ARM has been fostering for some time. The M0— in an equivalent silicon process and with a comparable performance configuration—occupies one-third the area of an ARM7TDMI core—a minimal configuration of the M0 uses 12k gates—and has processing power of 0.9 DMIPS/MHz, at 80 µA/MHz. The core is, in effect, a version of the M1 core, which ARM has optimised for fabrication on a full-custom platform: M1 is the core that ARM specifically developed for efficient implementation on an FPGA target, such as Actel, Altera, or Xilinx programmables. If you run the RTL code for M0 through an FPGA-optimised synthesis package such as, for example, Synopsys’ (Synplicity’s) Synplify, is the result an M1? “Definitely not,” says Dominic Pajak, product manager in ARM’s processor division: “It’s a completely new core design at a new lowcost/ low-power point, complementing the M3.” The M0 has the programming model of the M1 and is binary-compatible with the M3 that several manufacturers now license. Pajak emphasises that a key point of the M0 is energy efficiency as it has the same dynamic power as a 16-bit core. It will also run at “ultra-low-power” in deep-sleep mode, and with the 32-bit architecture you can perform tasks in fewer cycles, shortening the active period when you do wake it in intermittent applications. The M0 also extends the ARM offering to mixed-signal chips: it is very viable in 180- to 250-nm silicon processes, Pajak adds.
The M0 uses the same development tool chain as the M3, its instruction set comprising “the Thumb ISA plus a few Thumb-2 instructions.” It is also compatiblewiththeCortexMicrocontroller Software Interface Standard (CMSIS), the vendorindependent hardware abstraction layer for the Cortex-M processor series that ARM launched late in 2008. Typical application areas, ARM suggests, could include low-power wireless devices and sensors; human-interface products; metering; and ultra-low-power Bluetooth, also known as Wibree.
Early licensees of the Cortex-M0 processor include NXP Semiconductors and mixed-signal-ASIC designer Triad Semiconductor. Geoff Lees, vice president and general manager of NXP’s Microcontroller Division, says that the company will bring M0-based products to market later this year. The company’s experience with the M3 core, he adds, convinced NXP that there was scope to move to a much lower-power product regime; he hints that NXP may move to an all- ARM-based MCU strategy at some point in the future. The company’s experience with the M3 core saw fi rst silicon achieve 230 µA/MHz; successive refi nements, with voltage scaling, will allow the core to reach 150 µA/MHz. Lees’ team will build the M0 on the same silicon process and expects an optimised core to achieve 100 µA/MHz. Although the core will run at 40 to 50 MHz in that process, a more realistic regime for the typical applications of the device will be around 4 MHz, with peaks of 20 MHz to handle communications. The M0, Lees adds, has only one on-chip 32-bit bus and omits the USB interface of the M3, aiding the low-power demand. It also has low code size: “We have benchmarked it as being signifi cantly lower in code size than competing cores, including a popular 8-bit MCU core—we need to understand more about why that is before saying more about it.”
The Cortex-M0 processor is supported by the Keil MDK-ARM Microcontroller Development Kit, which integrates the ARM RealView Compilation Tools with the new Keil Vision4 IDE and debugger. Third-party tool and RTOS vendors, including CodeSourcery, Code Red, Express Logic, IAR Systems, Mentor Graphics, Micrium and Segger, also support the processor.
ARM, www.arm.com. NXP, www.nxp.com.