Crystal oscillator performance witout the crystal

EDN Europe, 18 Sep 2008

Silicon Laboratories is offering a new class of oscillator as a frequency reference for applications that the company characterises as “consumer timing”. The Si500 series is all-silicon; it does not use a crystal, but challenges crystal oscillators in the high-volume, frequency reference sector. Nor does it use a MEMS frequency reference; it is a compensated LC oscillator that has an overall frequency accuracy of ±100 to ±150 ppm (parts per million).
The new oscillators are parts that you order on short turn-round (samples in two weeks, minimum order 75 units) with a fixed operating frequency. Their architecture is a high-frequency oscillator running at around 4 GHz, with a factory-programmable divider chain and on-chip compensation. Silicon Labs holds stock of the unprogrammed parts and configures them to customer order. This is strategy the company has used before, in the case of crystal oscillators, to match the marketing patterns that industry buyers are familiar with. In an earlier offering of crystal-based devices, the company subsequently added a user-programmable variant to its range; a spokesman did not rule out making the same addition to the 500 series, but this will not be an option in the first release.
Although the initial absolute accuracy of the oscillator can be as high as 0.2 ppm, this is not part of the specification; the company guarantees the ±100 to ±150 ppm figure, over a lifetime of 10 years (to account for aging effects) and over a temperature range of 0 to 70C. An on-chip compensation function predicts and compensates for drift with temperature; this correction uses, “both analogue and digital techniques,” the company says, suggesting that it both shifts the oscillator’s fundamental frequency, and alters the digital division ratio. Final test of the chips includes a temperature characterisation, storing calibration points for each chip in the devices’ non-volatile memories. The part, which Silicon Labs builds in 0.13-micron CMOS (including the timing components), does not use a PLL architecture. The company describes the function that derives your specified output from the 4 GHz fundamental – you can order any frequency from 0.9 to 200 MHz – as a division, but the architecture likely employs some form of synthesiser technique. A major claim for this approach is low jitter; 1.5 psec RMS and 2 psec period jitter, maximum; comparable with crystal performance and several times better than that yet achieved by MEMS technology. Immunity to frequency change due to noise on power supply lines is also high. The chips will drive a variety of output formats (this is part of the initial programming setup) such as CMOS, LVPECL, LVDS, HCSL, or SSTL – which includes differential formats. The core oscillator uses 8 mA (from 3.3, 2.5, or 1.8V): overall power dissipation depends on what you drive with it. The footprint of the (plastic) package is compatible with industry-standard crystal types, and you can also order a dual-output version. Expect to pay from $0.95 to $2.24 (10,000).