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For the record 2/1/2012
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Cypress Semiconductor designed its PSoC (programmable System-on- Chip) devices to contain all of the functional blocks of a small embedded system : a microcontroller core, programmable logic, and configurable analogue functions. This product line has shifted the focus of the entire company, according to executive vice-president Norman Taffe. Before it conceived the PSoC product, Cypress was primarily an SRAM vendor; now, its principal product line is PSoC. In a series of introductions, the company has greatly expanded the scope and power of the chip family. PSoC 1, as it now terms the existing product line, is based around a proprietary 8-bit MCU core. Newly introduced are PSoC 3 and 5, hosting, respectively, a 33-MIPS-rated 8051 core and an ARM Cortex M3 offering 100-MIPS performance. In addition to a complete and configurable MCU, each part in the two families also has a configurable—or programmable— analogue and digital subsystem.
PSoC 3 and 5 parts have on-board up/down dc/dc conversion and will operate from any voltage from 0.5 to 5.5V, with a typical active power consumption of 1.2 mA/MHz for the 8051-based series, and 2 mA/MHz for the ARM parts. Corresponding sleepmode fi gures are 1 and 2 µA, with lower hibernate-mode levels in the 200-to-300-nA range also achievable. The devices have up to 24 channels of DMA with direct access to SRAM and the CPU. The cores have complete onchip debug and trace, so you do not need an emulator to develop MCU code. The digital sub-system comprises an array of up to 24 digital logic blocks, each based around a simple ALU (arithmetic logic unit) and, in total, equivalent to about 20 kgates of programmable logic. You can use this to defi ne “glue” logic functions, or to implement interfaces not already provided in hard-wired form; the chips host a range of these, including CAN, LIN, USB (full speed) I2C, UART, and I2S. The analogue portion of the chips consists of an array of pre-characterised functional blocks; in the same area there are a digital fi lter block, a 20-bit delta-sigma ADC and a 12-bit SAR ADC, plus several DACs. Partnering these functions there is a 0.1%- accurate voltage reference, a programmable-gain amplifi er, and multiple general-purpose op-amps. The chips come with Cypress’ CapSense touchsensing function and an LCD driver for up to 736-segment displays. Multiple devices in the family are pin-compatible for scalable designs; any I/O pin can route to any function, and any I/O can be analogue or digital. Chips, with a wide range of function set and performance, will have volume pricing in the range of $1 to $10. PSoC 3 parts are available now; PSoC 5 devices will appear in the fi rst quarter of 2010.
Cypress matches the new devices with a new design environment, PSoC Creator. Recognising that the chips bridge the design expertise of several different disciplines —MCU programmers, used to working in C-code; FPGA designers, working in schematic capture or HDL; and analogue engineers, who normally design with individual components— Cypress has endeavoured to construct an environment that will give an engineer from any of these backgrounds the ability and confi dence to design functions in the other two. You can work in a drag-and-drop, graphical design style using libraries of functions—MCU code, digital logic and analogue blocks— that Cypress provides, and extend that approach to designing your own custom elements within the same framework.
You can capture those efforts as proprietary IP and compile libraries of your own functions. The different disciplines are linked in the design environment; for example, you set analogue parameters from the MCU by way of APIs that the software automatically invokes. You can download the software free-of-charge from the company’s Web site, and there are two levels of evaluation/ development kits, priced at $49 and $249, respectively.
Cypress Semiconductor, www.cypress.com