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DSP with hardware acceleration transcodes HD in real time

The latest DSP chip from TI under its DaVinci branding is the TMS320DM6467, which the company has optimised for real-time video transcoding: it will handle high-definition video, and TI is claiming an order-of-magnitude gain in performance, and the sameorder reduction in systems cost. As with other recent parts in the family, the chip has an ARM core for control processing (in this case a 926EJ-S) and a 600-MHz C64x
DSP core (600 MHz, here). In this variant they are matched with a video co-processor into which TI hard-coded operations of transcoding HD video hard-coded into it, and with a conversion engine and appropriate video-interface ports. It will perform simultaneous multi-format HD encoding, decoding and transcoding up to H.264 HP at L4, which is 1080p at 30 frames/sec, or 1080i/720 at 60 frames/sec.

The co-processor and hardware acceleration deliver power equivalent to 3 GHz in a programmable DSP, TI says; offloading the main DSP engine in this way leaves over half of its processing capability available for application code. The conversion engine also hosts hardware chroma sampling and handles overlay of menus. Target markets are media gateways, video telephony and video security, where the system will handle not HD, but multiple channels of standard-defi nition video. In this scenario, the set-top-box becomes tomorrow’s “digital media adaptor” routing video to and from any format, from big-screen HD to cell-phone display.

The rationale for the “one-tenth cost” argument is that the processing load handled by this chip would previously have required three ’6415T DSPs, with more associated RAM and fl ash memory, and a larger FPGA. TI will sell the new part for $35.95 (50,000). As might be expected, TI supports it with its standard tool chain, accessing third-party software IP; there will also be an evaluation module that runs MontaVista Linux.

Texas Instruments, www.ti.com