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Dual/quad channel DAC FMC card

Curtiss-Wright Controls Embedded Computing has introduced a new FPGA Mezzanine Card (FMC/VITA 57) module, the FMC-520 DAC dual/quad channel DAC (digital-to-analogue converter) card that can support up to four analogue output channels updating at 500Msamples/s or two analogue output channels at 1.0Gsamples/s. The card is designed for use in military applications such as ECM (electronic counter measures), SDR (software defined radio) and RADAR that require high-speed ADC and DAC components. The card speeds and simplifies the integration of FPGAs into embedded system designs. The low latency, high-bandwidth module eliminates data bottlenecks to increase DSP subsystem performance by routing the high-speed DAC I/O directly to the host board’s FPGAs via the FMC connector. It complements the company’s family of high-speed ADC FMC cards, including the recently announced ADC511, ADC512, and ADC513, providing a complete ADC/DAC solution for DSP applications.

Available in both air-cooled and conduction-cooled rugged versions, the card features two Texas Instruments DAC5682Z 16bit DACs. Each device can be configured to support two channels with a 500Msamples/s update rate or a single channel with a 1Gsamples/s update rate. The card easily interfaces to FPGA-based host board such as the company’s Xilinx Virtex-5 FPGA processor-based FPE650 (Quad FPGA VPX), HPE720 (MPC8641D/dual FPGA VPX) and FPE320 (3U FPGA VPX) boards. By routing the DAC device interfaces directly to the FMC connector, the card enables an FPGA on the host board to ensure maximum throughput and directly control and receive data. The card features an onboard programmable clock generator with the option of using a 10MHz reference clock input to control the sampling rate for its DAC channels. An external RF clock input is provided to enable direct DAC sampling. The card is provided with HDL example code to simplify and speed integration into the HDL development suite for integration with the company’s FPGA host boards.