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FPGA-design kits target connectivity, DSP, embedded designs

Early in 2009 Xilinx indicated that it was embarking on a restructuring of its development-tool strategy for embedded designs on its Virtex and low-cost Spartan FPGA product lines. This started by rationalising the base platforms that it offers, and aligning them with dominant market sectors. Now the company has introduced what it terms the next level of that targeted-design-platform programme, in the form of six domain-specific design kits—three each for Virtex-6 and Spartan-6 chips—plus support in the latest, version 11.4, release of the ISE-designsuite software. The new kits target embedded processing, DSP and high-speed serial connectivity. They come with design flows, fully functional IP, and targeted reference designs common to the areas of expertise they are addressing. This means, Xilinx says, that you get a fully worked design for a task that embodies many of the typical functions in a given application space. You can use the design as it is, if that matches your needs; or you can take individual functions into your own design because the reference exercises are modular; or you can use the reference design as a “pattern” and use the same approach to progress your own design.

The embedded-system design platforms reside on Xilinx’s ML605 (Virtex-6 LX240T chip) or SP605 (Spartan-6 LX45T) boards and come with Platform Studio for hardware development and an Eclipse-based software-design kit. The reference design is a MicroBlaze 32-bit-core, fully functional compute engine with a hardcoded memory controller and I/O. For connectivity designs, Xilinx uses the same base development boards but adds an FPGA mezzanine card for the Virtex version that also provides a XAUI interface. The design example in that case is a PCIe (PCI Express)-to-XAUI bridge for the Virtex platform, or a PCIe-to-Gigabit Ethernet bridge in the case of Spartan. It includes thirdparty IP from Northwest Logic. Customers can choose fully compliant PCIe gen 1or gen 2 x1, x2, or x4 in the Virtex-6 FPGA kit, tune DMA settings to optimise system bandwidth, write and read data from external DDR3 memory, and create signal links to a full XAUI interface within a system environment. The Spartan-6 FPGA kit enables designers to link fully compliant PCIe gen 1 with Gigabit Ethernet using a full license of Northwest Logic’s DMA engine IP.

Third-party involvement comes into play in the DSP design kits; for Spartan-6, the platform is an AS150T evaluation board from Avnet, which also uses a higher-density Spartan-6 chip than the other examples. Reference designs are, in this case, more general collections of classic DSP functional blocks.

The Spartan-6 and Virtex-6 FPGA embedded- design kits cost $995 and $2495, respectively, including a full version of ISE Design Suite 11.4 Embedded Edition, the Eclipse-based software-development environment and unrestricted embedded IP. The Connectivity Kit for Spartan-6 costs $2495, and for Virtex-6 the price is $2995. DSP kits are scheduled for the fi rst quarter of 2010.

Xilinx, www.xilinx.com.