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FPGA/PCB design package adds ESL features

Version 6.8 of Altium’s Designer software is presented as a “service pack” but contains many new features that users might normally expect to see in a major revision: for example, it adds a 3D visualisation capability, and it ventures into—although the company does not use the term—ESL or system-level design territory with a hardware- /software-compiler capability for its FPGA-design facilities.

For some time, Altium has featured extensive support for design with FPGAs from all the major providers and has offered a range of components as IP, ready for the designer to dragand- drop into a device without leaving the Altium design environment. New in version 6.8 is a unifi ed hardware-software compiler. Altium has introduced this feature in part through its acquisition of Tasking; the feature allows you to carry out direct C-to-hardware compilation, and to choose which C functions and variables you wish to implement in hardware, before compilation. The compiler takes standard C as input—without special extensions—and outputs a combination of compiled object code and RTL that the software targets at the FPGA of your choice. You do not need HDL expertise to use the facility, the company says. The compiler/ debug combination has a profi ling function so that you can detect hotspots and bottlenecks in your task; given a certain level of expertise—“you need to know a bit about what you are doing”, is how an Altium spokesman describes the exercise— and if your task can be parallelised, you can have the compiler generate an application- specifi c co-processor to put the compute-intensive parts of your algorithm into hardware. With no special extensions to the C language, there are limitations— you cannot handle recursive functions—but you have control over how much of your FPGA the compiler can work with, and you can iterate and optimise the hardware/software mix to reach an effi cient solution.

At the physical, printed-board level, the package has a new 3D visualisation engine that is available in real-time as design proceeds, and that lets you rotate and fl ip a design, navigate around components, and zoom into the geometry as far as exploring the inner-layer structure of the PCB. The visualisation is fully rendered and textured: it can give you a virtual prototype to show design progress; and it can allow you to see component- and track-geometry confl icts, rather than imagining them from a 3-view representation.

Other features in 6.8 include full-length tuning and matching of differential PCB track pairs; live highlighting to quickly identify specifi c nets and objects; grouping and nesting of signal sets and harnesses; translators for DXDesigner, PADS and OrCAD project data; .pdf-format data output at any stage; and— a further aspect of the move to a system-level approach—a high level drag-and-drop method of defi ning an architecture to sketch out a processorbased system that feeds into the FPGA-based design environment. The package supports mixed-signal programmable design in the form of Actel’s Fusion chips.

A full initial purchase of an Altium seat is in the region of 10,000€, with a “foundation” or design-team-member version costing just over 4000€.

Altium, www.altium.com