• 12-bit, 1-Gsample/sec ADC is industry first, says Texas Instruments 27/10/2009

  Texas Instruments has introduced an analogue-to-digital converter with 12-bit resolution at a sample rate of 1 Gsample/sec; this amounts to a doubling of per-conversion signal bandwidth over any previously-available ....

  144-Mbit SRAM chips run at 550 MHz 14/10/2009

  Designers who need the fastest-available memory for applications such as the data paths in high-speed communications and networking now have a new device-density to work with; Cypress’ CY7C16xxKV18 ....

  Synopsys adds automated synthesis flow from Matlab’s “M” to RTL 8/10/2009

  Synopsys has introduced a logic synthesis flow that begins with algorithmic descriptions written in M language, and provides a route to implementation that does not require designers to re-code their ....

  Multi-core, multithreaded processor supports “green radio” 6/10/2009

  Under the banner of “Green Radio”, the IMEC research centre (Leuven, Belgium) has announced that the IP (intellectual property) for its second generation ADRES processor architecture is available for licensing. ....

  SuperSpeed USB Test Suite 2/9/2009

  LeCroy has announced what it terms a “single-source lineup” of test instruments to support the USB (Universal Serial Bus) 3.0 standard, also known as SuperSpeed USB. The package comprises an integrated ....

  Renesas offers design environment for SiPs 14/7/2009

  Renesas Technology has announced its SiP Top-Down Design Environment for system-in-package (SiP) products combining multiple chips. It uses a top-down (predictive) design approach in which key characteristics, ....

  500 Msample/sec, 12-bit digitiser 10/7/2009

  Spectrum’s M3i.3240 is, its makers say, the fastest monolithic 12-bit A/D converter available. It uses one dedicated ADC per channel with no interleaving, for optimum signal quality. ....

  Akya reveals dynamically reconfigurable logic technology 28/5/2009

  Akya is a UK-based start-up that is offering IC-designers IP (intellectual property) to include reconfigurable logic on their ASSPs or ASICs; Akya (say; Ak-eye-ya) will deliver both reconfigurable logic ....

  Cadence links FPGA pin allocation to PCB layout tools 20/5/2009

  Designers who use today’s large FPGAs on their PCB face an increasing problem handling the pin-out and board tracking around the packages of those programmable devices. The FPGAs have large, sometimes very large, pinouts; they offer considerable flexibility ....

  Lattice aims for "sweet spot" of SERDES-FPGA applications 23/2/2009

  When, in 2006, it introduced its ECP2M series of FPGAs, Lattice Semiconductor claimed to have carved out a distinct niche in the programmable device market. That is, low-cost and low-power parts, with fast serial data capability, with density appropriate ....

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