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Hybrid signal processing VPX board

BittWare has released the GT-3U-VPX (GT3X) board, which features a large Altera Stratix II GX FPGA and one cluster of four ADSP-TS201S TigerSHARC processors from Analog Devices. The front panel provides high-speed SerDes, 10/100 Ethernet, and RS-232; and the back panel interface supports PCI Express, Serial RapidIO, GigE, and 10 GigE. The board can achieve simultaneous on-board and off-board data transfers at rates exceeding 2Gbyte/s via BittWare’s ATLANTiS FrameWork implemented in the Stratix II GX FPGA. The GT3X is a COTS VPX (VITA 46) board based on Altera’s Stratix II GX and provides a hybrid signal processing architecture that takes advantage of both FPGA and DSP technology. The combination of the Altera Stratix II GX FPGA with the TigerSHARC processing cluster makes this a power-house of a board. In addition, with the GT3X connecting almost all VPX signals to the Stratix II GX FPGA, it can support many of the emerging Open VPX slot profiles. The board offers better signal processing performance capabilities for extended temperature, conduction cooled, military and defense applications in radar, electronic warfare, image processing, and signal intelligence.

The features of the board includes: Altera Stratix II GX FPGA supported by ATLANTiS FrameWork for I/O, routing, and processing; up to 132,540 equivalent Les; 252 embedded 18x18 multipliers, 63 DSP blocks, and 6.7Mbit of RAM; IP available for serial RapidIO, PCI Express, GigE, 10 GigE, CPRI, and OBSAI; 19 channels of high-speed SerDes transceivers; eight link ports up to 600Mbyte/s each routed from on- board DSPs; 32 LVDS pairs (16 Tx and 16 Rx) to rear panel; BittWare’s FINe host/control bridge providing control plane processing and interface; GigE and RS422 to rear panel; 10/100 Ethernet and RS232 to front panel; one cluster of four ADSP-TS201S TigerSHARC DSPs; 48 GOPS 16bit fixed point, 12 GFLOPS floating point processing power; four link ports per DSP; two link ports routed to the ATLANTiS FrameWork; two link ports routed for interprocessor communications; 24Mbit of on-chip RAM per DSP; 3U VPX form factor (VITA 46); 15 SerDes lanes (supports Serial RapidIO, PCI Express, and 10 GigE [KX4]) to Stratix II GX via P1; 32 LVDS pairs (16 Tx and 16 Rx) to Stratix II GX via P2; GigE and 2 RS422 to FINe; up to 1Gbyte of on-board DDR2 SDRAM; and 64Mbyte of flash memory for booting DSPs and FPGA.

The board is supported by Altera’s Quartus II FPGA tools and ADI’s Crosscore tool suite for application/code development. BittWare’s BittWorks tool suite provides everything necessary for host and embedded development and consists of: HIL (host interface library), a full featured, mature API (application programming interface), which provides a C callable interface to BittWare boards from the host system (connected or remote) to read and write to memory, provide board and processor control and control interrupts; BWIO library, which provides a common interface for all supported components, easily supporting new features without API changes, and contains ATLANTiS/DSP/board component drivers, and POSIX-based I/O (open, read, write, Ioctl, close); BittWare Utilities that includes access control to BittWare devices, a scan for BittWare devices on the network, access control from remote clients, automated host and DSP-based (if applicable) diagnostic tests, low-level debugging, loader for the ATLANTiS FPGA, and a graphing utility for exploring board memory; and the third party tools coupled with BittWare’s BittWorks tool suite combine to make developing and debugging efforts on the GT3X easy and efficient.