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I2C interface has galvanic isolation, wired-OR capability, improved noise margin

This Design Idea describes a simple and effective way to provide optoisolation for devices connected on the I2C bus (Figure 1) and improves on an earlier version (Reference 1). SDA and SCL are on the bus master’s side of the I2C bus; SDA1 and SCL1 are on the slave device’s side. It is fairly easy to optoisolate the clock line because it is unidirectional, from the master to the slave device. A P-channel MOSFET, Q3, provides the current for the LED of the fast optocoupler, IC2, bufferingthe clock line.

The data line, however, is bidirectional. This section of the circuit is symmetrical. Resistors R6 and R7 are the I2C pullup resistors on the slave device’s side of the bus, and R3 and R1 are dummy pullups in parallel with the main I2C pullup resistors on the SDA/SCL side. If both SDA and SDA1 lines are high—that is, no I2C devices are pulling them down—Q1 is off, no current flows into the LED of optocoupler IC2, IC2’s Pin 7 is high, Q2 is off, and the LED of optocouplerIC1 is also off.

If a device drives the SDA line low, Q1 and the LED of IC2 turn off, driving IC2’s Pin 7 low; diode D2 then starts to conduct. The result is a low level on the SDA1 line—the low output voltage of IC2 plus the threshold voltage of Schottky barrier diode D2. It is important to notice that in this situation, the LED of IC1 does not turn on because the voltage applied across it is below its threshold. This situation means that the circuit does not latch, and it can recover from thisstate once you release the SDA line.

Q3 and the PNP BJT (bipolarjunction transistor), Q1, effectively buffer the two SDA/SCL lines so that no extra current flows intothe open-collector and -drain stages of the I2C devices that connectto the bus when they hold the linesdown. This configuration allows theoptoisolated interface to repeatedlypull low, providing wired-ORcapability. Using Schottky barrierdiodes for D1 and D2 rather thancommon diodes reduces the lowlevelvoltage on the bus, improvingthe noise margin. Finally, because ofthe low propagation-delay times ofthe Fairchild Semiconductor (www.fairchildsemi.com) HCPL06XX devicesthat this design uses, this interfacehas no bus-glitch problems andworks well at speeds of 400 kHz orhigher (Reference 2).

REFERENCES

Nguyen, Minh-Tam, and Martin Baumbach, “Two-wire interface has galvanic isolation,” EDN, Nov 11, 1999, pg 174, www.edn.com/article/ CA46286. Blozis, Steve, “Opto-electrical isolation of the I2C-Bus,” Embedded Systems Design, Oct 14, 2004, www.embedded.com/showArticle. jhtml?articleID=49901764.