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IC performs delayed system reset upon power-up

In most applications, the MR (manual-reset) pin usually connects to a switch to create a manualreset signal to the supervisory chip. Subsequently, after a predetermined time-out-active period, it goes back to the high state in an active-low reset. A manual reset is a good feature for most applications; however, it requires human intervention to create the reset. In some applications, a manual reset could be a hassle because you must perform it each time the system powers up.

Further, applications involving embedded microprocessors can require the reset output to hold high—that is, inactive—for a certain period of time before you can apply the reset, or active low. The circuit in Figure 1 proves useful during power-up when there is no need to press the reset button once the device powers up, because reset occurs automatically with the predetermined hold time before you apply the reset-low signal.

The circuit employs a reset-supervisory chip with the MR pin and active-low output, RESET. Normally, the MR input has an internal pullup resistor with a value of 20 to 50 kΩ. During power-up, this MR internal resistor charges up capacitor C₁ to the maximum value to V_DD at the positive side. To create an MR reset input to the supervisory chip, its MR input must receive an active-low ground signal, requiring transistor Q₁ to turn on. The turn-on-time period depends on the RC-time constant of R₁ and C₂. These two components determine when Q₁ turns on and thus provide an adjustable hold time for the RESET output to hold high. To increase the hold time, simply increase the RCtime constant of R₁ and C₂.

The supervisory reset chip asserts its RESET output only when the voltage at the MR pin exceeds the thresholdtrigger voltage and the supervisor’s internal reset period has elapsed. This time-out period filters any short inputvoltage transients. Because of Q₁’s turnon, the negative side of C1 becomes grounded. Because the positive side of C₁ cannot instantly change its polarity, it pulls low and slowly charges up again through the internal pullup resistor of the MR input. When it reaches the threshold voltage of the reset chip, it then asserts the reset once it reaches the time-out period of the chip. The selection of C₁ is not critical. However, its value should be sufficiently large— 0.1 to 10 µF, for example—that the RC time constant for C₁ and the internal pullup resistor are large enough. This value ensures that C₁ holds the voltage low at MR for at least 1 µsec.

The transistor remains on after C₂ charges toward the biased voltage of Q₁. At the next power-up or when you manually reset the circuit by pressing the pushbutton switch, the transistor discharges C₂. Once this action happens, Q₁ turns off. R₁ charges up the negative side of C₁ to the supply voltage, V_DD. Because the positive side of capacitor C₁ cannot change instantly, it appears to be charged to 2V_DD. However, the protection diode, D₁, clamps C₁’s voltage to just V_DD plus the diode’s turn-on voltage. The cycle repeats once C₂ charges enough to again turn on Q₁.