Jitter & Noise

EDN Europe's Editor Graham Prophet posts a selection of comments and insights prompted by the many items of industry news and rumour that cross the editorial desk or are gathered on his frequent travels to interviews, press conferences and events around Europe - and further afield - and somehow never find their way to the magazine or the web site, recovering some of the information otherwise lost in the noise level...

Friday, July 03, 2009

Integrate or....not?

| Permalink | Email This | Comments (0) |
| Digg This | Slashdot This | add to Del.icio.us |

An interesting sidelight from the account I just posted on the news stream about NXP’s ATOP module for in-car telematics functions. As I noted there, it has four major chips on it; could you integrate those any further, I asked? We could, said an NXP spokesman, but we probably wouldn’t. Not while we are at trial-level volumes, and possibly not ever. The reasons NXP cites are familiar; the costs and risk of developing such a large mixed-signal chip; plus, the fact that the MCM approach, “leaves each [major functional chip] to follow its own road-map.”
That is, a major semiconductor company, looking at an application that might eventually go to very high volumes, looks at the mega-scale-SoC option and says, (my words, not theirs) “not worth the trouble.”
Is any more confirmation needed that, for all but a select few of the highest-volume, technology-constrained applications, where absolutely nothing else will do, the all-in-one-chip, total-system-on-a-chip concept is a mirage?

Post a comment

Note: fields with an asterisk(*) are required information.
All submissions are subject to review before they are posted live.

* Display Name

* Comments

 

* Anti Spam security code


To pervent spamming, please enter the anti-spam code as shown above to proceed with the submission
   
 

 

Our Sponsors



Ads by Google