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Low-cost PCI Express development kit

Lattice Semiconductor has announced the availability of a low-cost PCI Express development kit for its LatticeECP3 family of high-value, low-power FPGAs. Based on a new ECP3 PCI Express solutions board, the kit accelerates development of PCI Express designs. The kit has been developed to accelerate the evaluation of Lattice PCI Express technology, demonstrate a range of solutions that match typical application requirements and speed users to design exploration. The new kit features four key capabilities for quick evaluation and rapid prototyping of low-cost PCI Express system design. First, the kit enables users to bring up running PCI Express hardware in thirty minutes or less. Second, various demos included in the kit address control plane through data plane performance requirements. Third, source files for the demos are available that enable rebuilding designs up to a known good starting point. Finally, the kit enables a rapid transition to design exploration through the included software tools, IP-enabled evaluation process and project source directories.

The kit offers several key features for rapid, low-cost PCI Express system design. It features an optimised, low-cost PCI Express evaluation board that enables both x1 and x4 endpoint evaluation and design. The kit features a variety of demo executables: basic demo for control plane applications, throughput demo for high-bandwidth applications, colour bar demo and an image transfer demo that show how to address different design performance requirements. A 60 day software tools license and included x1/x4 endpoint IP core and scatter-gather DMA IP core permit users to get up and running right away. The components of the kit have been configured to work together to enable fast system evaluation and design. With the help of easy step-by-step instructions, designers can expect to have a demo running in as little as 30 minutes, and a design validated in less than two hours. The LatticeECP3 FPGA family is comprised of five devices that offer standards-compliant multi-protocol 3.2G SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP slices that are suitable for high-performance RF, baseband and image signal processing.