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Microcontroller drains batteries down to 0.9V

Silicon Laboratories has an existing line of 8-bit microcontrollers based on a new version of the 8051 core, which its designers recast as a pipelined, 100-MIPS CPU; to this, the company adds mixed-signal and analogue features such as highprecision data converters. The latest part in this product line is the C8051F9xx family, which will operate down to 0.9V to extract the greatest possible life out of a singlecell battery. It has an on-board boost converter that can supply the MCU and up to 65 mW of power for external circuitry, which allows you to use power from a primary cell until it is completely exhausted at 0.9V. However, Silicon Labs says that this architecture allows a wide range of efficient battery- operation modes that goes beyond simply draining a single cell to its limits—it will operate from 0.9 to 3.6V and also incorporates a lowdrop- out regulator. You can power the device from two cells in series, and its LDO will deliver a constant 1.7V to the core; or, you can use two cells in parallel and exploit the boost converter to operate down to their limits. Either way, the company claims, there are configurations to power the chip that are more energy-efficient than other devices currently in the market. A graphical/spreadsheet design tool estimates battery life in the various configurations, taking into account the discharge characteristics of different cell chemistries. As a primary cell drops close to 0.9V, its remaining capacity is limited, and at that point the boost converter will be making maximum demands on it— so end-of-life may still arrive relatively quickly.

You gain over a discrete solution, the company says, because in a design with a separate dc/dc converter and MCU, the converter must run continuously even if the MCU is in sleep mode. In the C8051F9xx, a separate power path exists that allows the converter to be off while the core is in sleep mode, saving power.

The C8051F9xx has a typical sleep-mode current of less than 50 nA. The MCU can wake up from its low-power sleep mode with the CPU operating at 25 MIPS and is ready to make an analogue-to-digital conversion in 2
sec. In active mode, current demand is 170
A/MHz. On-chip features include 64 kbytes of fl ash and 4 kbytes of RAM, a 10-bit, 300-ksps ADC with an internal fast wake-up voltage reference, plus a timing module and multiple internal oscillators.

Silicon Labs provides an integrated development environment, a target board, cables and a power supply in a starter kit, or you can begin evaluation using an inexpensive ToolStick daughter card and base adapter. The chips are in 24-pin, 44-mm QFN, 55-mm, 32-pin QFN and 77-mm, 32-pin LQFP packages, with prices from $1.99 (10,000). Development kits cost $99, and ToolStick daughter cards $17.90.

Silicon Labs, www.silabs.com.