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Multi-core, multithreaded processor supports “green radio”

Under the banner of “green radio”, the IMEC research centre located in Leuven (Belgium) has announced that the IP (intellectual property) for its secondgeneration ADRES processor architecture is available for licensing. ADRES stands for “architecture for dynamically reconfigurable embedded systems”; it now supports multithreading, and achieves twice the performance and energy efficiency of the first-generation design. According to IMEC’s group science director of wireless research, Liesbet Van der Perre, the overall objective of the green-radio programme are the development of lowenergy and low-power wireless systems that have very high spectral efficiency, for veryhigh- data-rate environments that will typify 4G communications systems. The programme focuses on a reconfigurable radio front-end that IMEC will bring to market with Ansem; a software-defined-radio element using the ADRES that is progressing towards a reconfigurable, cognitive radio concept; and work on a very-highbandwidth wireless personalarea- network technology using frequencies in the 60-GHz region. The cognitive radio, Van der Perre says, needs reconfigurable front-end and baseband blocks, plus the ability to detect spectrum occupation and adapt accordingly; and in such a “digital-intense” architecture, the analogue/digital converter moves ever closer to the antenna. Ultimate datarate targets for the 4G-radio concept are a download speed of 100 Mbits/sec when mobile and of as much as 1 Gbit/sec when stationary, probably using a 44 MIMO radio link.

Through an XML template, designers who licence the ADRES processor can create an instance that is best suited for their applications, although Van der Perre anticipates that most optimisation will be at the algorithmic level. You can program applications for an ADRES processor in a high-level programming language such as C using IMEC’s DRESC compiler. Van der Perre adds, “The current architecture is designed to support 600-Mbps 802.11.n on two cores with a total power use of 220 mW, using 40-nm technology. [Early in] 2010, we will extend the ADRES with wide SIMD. This will improve the energy effi ciency by another 30%. As a proof of concept, we’ve successfully mapped a 40-MHz WLAN MIMO receiver on an instance of the new ADRES”. The architecture employs a multicore array of processing units—IMEC shows 32 in the current version—that gain their effi ciency, the researchers say, by supporting combinations of different styles of parallelism: instruction-level, datalevel and task-level. IMEC says its software now has the capability to take application code, plus “some directions on how to parallelise it”, and derive a parallelised implementation. Designers will, Van der Perre, predicts, optimise the ADRES for applications that are unrelated to the 4G systems that the group is currently working towards.

IMEC, www.imec.be.
Ansem, www.ansem.com