16-bit, 5.9 Gsps interpolating and modulating RF DAC

December 24, 2015 // By Graham Prophet
Maxim Integrated has posted details of an RF digital to analogue converter with a JESD204B interface, that can carry out direct RF synthesis of 600 MHz instantaneous bandwidth waveforms from DC to greater than 2.8GHz.

The MAX5869 is intended for use in digital video broadcast and cable applications and meets spectral mask requirements for a broad set of communication standards including DVB-T, DVB-T2, DVB-C2, DVB-S2, DVB-S2X, ISDB-T, EPoC, and DOCSIS 3.0/3.1. Anticipated uses include digital video broadcast, in DVB-T/DVB-T2/ISDB-T modulators; DVB-C2/DVB-S2/DVB-S2X modulators; downstream DOCSIS CMTS modulators; and Ethernet PON over coax (EpoC).

The device integrates interpolation filters, a digital quadrature modulator, a numerically controlled oscillator (NCO), clock multiplying PLL+VCO and a 14-bit RF DAC core. The user-configurable 5x, 6x, 6.67x, 8x, 10x, 12x, 13.33x, 16x, 20x or 24x, linear phase interpolation filters simplify reconstruction filtering, while enhancing passband dynamic performance, and reduce the input data bandwidth required from an FPGA/ASIC. The NCO allows for fully agile modulation of the input baseband signal for direct RF synthesis.

The DAC accepts 16-bit input data via a four-lane JESD204B SerDes data input interface that is Subclass-0 and Subclass-1 compliant. The interface can be configured for 1, 2, or 4 lanes and supports data rates up to 10Gbps per lane allowing flexibility to optimise the I/O count and speed.

The device’s clock input has a flexible clock interface and accepts a differential sine-wave, or square-wave input clock signal. A by-passable clock multiplying PLL and VCO can be used to generate a high-frequency sampling clock. The device outputs a divided reference clock to ensure synchronisation of the system clock and DAC clock. In addition, multiple devices can be synchronised using JESD204B Subclass-1.

The MAX5869 uses a differential current-steering architecture and can produce a 0 dBm full-scale output signal level with a 50Ω load. Operating from 1.8V and 1.0V power supplies, the device consumes 2.5W at 4.9 Gsample/sec. The device is in a 144-pin, 10 x 10 mm, FCCSP package and is specified for the extended industrial temperature range (-40°C to +85°C).

The DAC is supported by an evaluation (EV) Kit that provides a complete system for evaluating the performance of