16-core SoCs target data centers and IT infrastructure

June 11, 2015 // By Julien Happich
Cavium has added two new pin-compatible families CN73XX and CN72XX to its OCTEON III MIPS64 multi-core processor line, spanning 4 to 16 cores.

The low-power processor families will accelerate the emerging applications in Software Defined Networking (SDN) and Network Function Virtualization (NFV).

The OCTEON III CN73XX and CN72XX family SoCs pack up to 16 cores that deliver up to 35GHz of compute, 40Gbps of application performance and 120Gbps of networking connectivity in low-power configurations starting as low as 8W.

Packet parsing capabilities are integrated that can process both existing and emerging protocols such as MPLS, NVGRE, and VxLAN at line rate, along with sophisticated traffic management capabilities that provide the fine grained traffic shaping and QoS required for application-centric networks.

The integrated hardware accelerated security processing capabilities are turbo charged with support for a range of new crypto algorithms including the latest SHA3 and enable 40Gbps IPSec using a single chip, to efficiently secure high-throughput enterprise, datacenter, and wireless backhaul connections.

Cavium's latest Deep Packet Inspection (DPI) is able to scan millions of flows and patterns in real-time to enable enterprises and service providers to provide robust protection against security threats while delivering intelligent application-based services.

The chips come with a rich set of software tools, libraries and application software including a comprehensive carrier grade SDK, and optimized software toolkits including TCP/SSL/IPsec.

Visit Cavium at www.cavium.com