16/32-Mbit low-power SRAMs boost soft error immunity by 500x

July 23, 2015 // By Graham Prophet
Renesas’ Advanced Low Power SRAM increases resistance to soft errors by 500 times compared to full CMOS memory cells, while contributing to longer backup battery service life by reducing standby current by half.

Two series of Advanced LP SRAM, the leading type of low-power-consumption SRAM, are designed to provide enhanced reliability and longer backup battery life for applications such as factory automation (FA), industrial equipment, and the smart grid. Fabricated using a 110-nm process, the RMLV1616A Series of 16-Mb devices and the RMWV3216A Series of 32 Mb devices use an innovative memory cell technology that improves reliability and contributes to longer battery operation.

Demands for highly secure and reliable user systems are driving increased demand for highly reliable SRAM, to store information such as system programs and financial transaction data. The prevention of soft errors caused by alpha particles and cosmic neutrons is a significant issue. Typical measures to deal with this problem include embedding an error correcting code (ECC) circuit in the SRAM or user system to correct any soft errors that occur. There are limits, however, to the error correction capabilities of ECC circuits. For example, some cannot correct simultaneous errors affecting multiple bits.

Renesas’ Advanced LP SRAM devices feature proprietary technology in their memory cells that achieves soft error resistance over 500 times that of conventional Full CMOS memory cells.

In the Renesas Advanced LP SRAM structure, a stacked capacitor is added to each memory node within the memory cells. This configuration suppresses the generation of soft errors to a level that is effectively soft error free. The load transistor (P-channel) of each SRAM cell is a polysilicon thin-film transistor (TFT) that is stacked on top of the N-channel MOS transistor formed on the silicon. Only the N-channel MOS transistor is formed on the silicon substrate below. This means that no parasitic thyristors are formed in the memory area and theoretically makes latch-up impossible. Therefore, the Advanced LP SRAM is well suited to applications requiring high reliability.

The standby current of the new RMLV1616A Series and RMWV3216A Series is only 0.5 μA (typical) for 16 Mb devices and 1 μA