The software automates Liberty model creation for large mixed-signal macro blocks; a unique hybrid partitioning approach increases throughput and reduces turnaround time, and the offering is integrated with Cadence's Virtuoso Analog Design Environment XL.
Built upon the Cadence Liberate characterisation platform, Virtuoso Liberate AMS characterises post-layout netlists of mixed-signal macros with millions of associated parasitic elements 20-times faster than traditional “divide and conquer” FastSPICE simulation methods and with true SPICE accuracy to enable accurate system-on-chip (SoC) signoff.
With the increasing complexity of SoCs, and the industry shift towards intellectual property (IP) reuse and digital-on-top design flows for signoff with static analysis tools, Cadence says that Liberty representations are required for all blocks in the design including mixed-signal macros. To simplify this process, Virtuoso Liberate AMS automates standard Liberty model creation for large mixed-signal macro blocks by capturing the interaction between digital and analogue paths and modeling it into a final Liberty library.
To increase throughput and reduce turnaround time from weeks to hours, Virtuoso Liberate AMS integrates Cadence’s advanced FastSPICE technology, Spectre XPS, and employs a hybrid partitioning approach to statically identify required arcs and dynamically exercise them to characterise large mixed-signal blocks. This hybrid partitioning approach identifies circuit activity at the block level to carve out a critical-path partition for each logic arc and then characterises each partition with true SPICE accuracy to create highly accurate library models.
For custom circuit designers, Virtuoso Liberate AMS is integrated with Virtuoso Analog Design Environment XL and uses Virtuoso Analog Design Environment XL testbenches and setup to quickly move from circuit design validation into library generation.
“Prior to using Virtuoso Liberate AMS, the characterisation process for mixed-signal blocks was an error-prone manual process,” said Darren Engelkemier, vice president of Digital IC Engineering, of Aquantia Corp. “With Virtuoso Liberate AMS, our design teams were able to automate this task by eliminating netlist processing and getting more accurate and reliable data especially for our