The device is intended for applications such as automotive instrument clusters, industrial automation, communication systems, and medical equipment, which need the highest read bandwidth to enable the fastest boot time for instant-on requirements, along with a low-pin-count interface to reduce package size and PCB cost.
Running at frequencies up to 166 MHz, HyperFlash products can achieve Double-Data-Rate (DDR) read bandwidths as high as 333 MBps for 1.8V products and 200 MBps for 3.0V products. The 256 Mb HyperFlash device comes in a 48-mm ² (6 x 8 mm) 24-ball package, and it delivers high reliability and extended temperature range of -40ºC to +125ºC.
Cypress adds that HyperFlash devices provide a seamless migration path from Quad SPI to dual Quad SPI to HyperFlash memory, allowing system applications to be scaled to different levels of flash performance when paired with compatible controllers. This provides OEMs the ability to offer different product models with a single design.
Processors that have been publicly announced to support the HyperBus interface include the Freescale MAC57D5xx Automotive DIS MCU, the Cypress FM4 S6E2DH general purpose MCU and the Cypress Traveo S6J324C and S6J326C automotive MCUs. Cypress is working closely with many processor companies and platforms are currently in development to support the HyperBus interface.
The efficient 12-pin Cypress HyperBus interface consists of an 8-pin address/data bus, a differential clock (2 signals), a chip select and a read data strobe for the controller—all of which help reduce the overall cost of the system through reduced pin count. Memories based on the interface enable systems with faster response times and rich user experiences.
Cypress’s 3.0V, 256Mb S26KL256S will be available in both 3.0V and 1.8V versions in the same package.
Cypress Semiconductor; www.cypress.com