32-bit microcontrollers reduce power in the Internet of Things

October 09, 2012 // By Nick Flaherty
Silicon Laboratories has launched a family of 32bit microcontrollers to reduce the overall system power in designs for the Internet of Things.

The Precision32 SiM3L1xx MCUs integrate a 50 MHz ARM Cortex-M3 processor core with mixed-signal blocks including an on-chip DC-DC converter. This helps reduce power consumption to 175 µA/MHz in active mode and less than 250 nA in sleep mode with the real-time clock (RTC) enabled at 3.6 V, but it is the ability to reduce the system power that is vital, says Mike Salas, vice president and general manager of the MCU business at Silicon Labs.

"Everyone talks about the headline power consumption but the key is the focus on the system level power issues and specifically for this family on the use cases that allow us to optimize the system power," he said. The devices are aimed at smart metering, utility monitoring, home automation, wireless security, asset tracking, personal medical devices and other power-sensitive applications.

The integrated DC-DC converter is significantly more efficient than a low drop out (LDO) regulator and can control the power to external peripherals to optimize the current consumption and use the CPU to switch off the peripherals when not in use. Further system power reduction comes from adding additional state machines and DMA engines to handle packet creation and data movement without even waking the CPU core for wireless and sensor applications.

The Precision32 mixed-signal MCUs include power-saving peripheral and architectural innovations that can reduce current consumption below that of many 8-bit MCUs, with active mode power reduction achieved through a number of key innovations. For example, dynamic voltage scaling adjusts the internal device voltage in response to changing conditions. The integrated, high-efficiency dc-dc buck converter reduces active mode power by 40 percent compared to competing 32-bit MCUs. Dedicated peripherals such as a data transfer manager, AES encryption block and run-time encoder accelerate the processing of RF protocol for wireless applications without CPU intervention, greatly reducing system power.

Enhanced direct memory access (DMA) can reduce protocol-related power by 90 percent, and RAM and register