3.3V PCIe clock generators cut power draw

June 17, 2015 // By Graham Prophet
IDT asserts that these clock chips virtually eliminate thermal concerns while greatly exceeding PCIe Gen3 jitter requirements in anticipation of the PCIe Gen4 Spec.

6- and 8-output 3.3 V clock generators join IDT’s low-power PCI Express (PCIe) portfolio. The 3.3V family of devices are in addition to the existing 1.5 V and 1.8 V families. These products operate at approximately 100 mW, making them the lowest power 3.3 V PCIe clock generators available at roughly one-fifth the power of traditional PCIe clock devices: the IDT 3.3 V devices effectively eliminate thermal concerns.

With their integrated terminations, the 9FGL06 and 9FGL08 devices’ 5 x 5- and 6 x 6-mm packages can deliver up to a 90% reduction in board area. Factory programmable versions provide quick turn device optimisations to meet exact requirements. The SoC-friendly devices exceed the phase jitter requirements of the PCIe Gen3 specification in anticipation of the upcoming PCIe Gen4 specification, and are also suitable for applications needing less than 3 psec rms 12k-20M phase jitter, such as gigabit Ethernet and other high-performance applications..

The 3.3 V devices are pin-compatible to IDT’s 1.5 V 9FGU-series and 1.8 V 9FGV-series PCIe clock generators. The timing family targets power- and space-constrained designs in both consumer and high-performance applications, providing enterprise-level performance. Potential applications include multi-function printers, servers, set-top boxes and solid state drives. The entire family is compliant with PCIe generations 1, 2 and 3.

The 3.3 V (L-series) family offers;

• Output-by-Output configuration of output impedances, allowing a single part to be used in mixed impedance environments without external termination components.

• Factory programmable versions that allow user-defined default configurations including output impedance, control input polarity, internal pull up or pull down resistors, and wake-on-LAN mode for the crystal oscillator. This removes the need for practically all external glue logic.

IDT plans to follow this initial offering with 3.3 V versions of low-power PCIe buffers and multiplexers that are pin-compatible to the successful 9DBU/V and 9DMU/V families. The 9FGL PCIe clock generator family includes devices with 2, 4, 6, or 8 outputs. The clock