385 MHz bandwidth IF diversity receiver IC

January 12, 2015 // By Graham Prophet
Analog Devices has posted information on the AD6674, which is a 385 MHz bandwidth mixed-signal intermediate frequency (IF) receiver.

The IC consists of two, 14-bit 1.0 Gsample/sec/750 Msample/sec/500 Msample/sec analogue-to-digital converters (ADC) and various digital signal processing blocks consisting of four wideband digital downconverters (DDCs), a noise shaping quantiser (NSR), and variable dynamic range (VDR) monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analogue signals of up to 2 GHz. The AD6674 is optimised, ADI says, for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.

The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.

Use the part in diversity multiband, multimode digital receivers; 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A receivers; DOCSIS 3.0 CMTS upstream receive paths; or HFC digital reverse path receivers.

The device' feature list includes;

JESD204B (Subclass 1) coded serial digital outputs

In band SFDR = 83 dBFS at 340 MHz (750 Msample/sec)

In band SNR = 66.7 dBFS at 340 MHz (750 Msample/sec)

1.4 W total power per channel at 750 Msample/sec (default settings)

Noise density = −153 dBFS/Hz at 750 Msample/sec

1.25 V, 2.5 V, and 3.3 V DC supply operation

Flexible input range

AD6674-750 and AD6674-1000

1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal)


1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal)

95 dB channel isolation/crosstalk

Analog Devices; http://www.analog.com/en/analog-to-digital-converters/integrated-receivers/ad6674/products/product.html