3rd-generation SiC MOSFETs with trench gate structure

May 22, 2014 // By Graham Prophet
Rohm Semiconductor's 3rd Gen SiC MOSFETs, based on Trench Gate structure technology, mark – says the company – another milestone in the development of SiC MOSFET which the company started in 2010.

Compared to conventional planar MOSFETs which have JFET regions increasing the on-resistance, the new MOSFET types only reach about half of the same on-resistance over the whole temperature range while the stability of the Gate oxide film and of the Body Diode remains as high as with Rohm’s 2nd Generation SiC MOSFETs. Since the company managed to overcome issues regarding oxide breakdown with high-drain source voltage, the result is higher reliability and increased current-carrying capacity at reduced cell density, minimum conductivity loss and minimum switching loss while keeping a compact format.

Rohm previously developed SiC planar MOSFETs which have oversome degradation of parasitic PN junction diodes when forward current penetrates. The low on-resistance of the trench SiC MOSFETs is ideal for improving inverter power density and performance. The new devices deliver optimised R DS(ON) and C iss characteristics in order to adjust efficiency and switching speed. The parasitic diode only shows minimal reverse recovery behaviour and degradation caused by its conduction is largely eliminated.

Rohm Semiconductor; www.rohm.com/eu