4 Mbit asynchronous SRAMs have on-chip ECC

April 22, 2015 // By Graham Prophet
These 4Mb SRAMs improve data reliability by three orders of magnitude over SRAMs without ECC, while helping to conserve battery life in handheld systems.

Cypress Semiconductor’s 4Mb asynchronous SRAMs with ECC can provide the highest levels of data reliability, without the need for additional error correction chips—simplifying designs and reducing board space. The devices ensure data reliability in industrial, military, communication, data processing, medical, consumer and automotive applications.

Soft errors caused by background radiation can corrupt memory content, resulting in a loss of critical data. A hardware ECC block in Cypress's new asynchronous SRAM family performs all error correction functions inline, without user intervention, delivering Soft Error Rate (SER) performance of less than 0.1 FIT/Mb (one FIT is equivalent to one error per billion hours of device operation). The new devices are pin-compatible with current asynchronous fast and low-power SRAMs, enabling you to boost system reliability while retaining board layout. The 4Mb SRAMs also include an optional error indication signal that indicates the correction of single-bit errors.

"We have received an overwhelming response from customers on our 16 Mb asynchronous SRAMs with ECC, the first devices of our SRAM with on-chip ECC family that we introduced last year," said Sunil Thamaran, senior director of the Asynchronous SRAM Business Unit at Cypress. "Adding a new density to this family broadens the applications that can benefit from our on-chip ECC technology."

The Cypress 4 Mb asynchronous SRAMs are available in three options—Fast, MoBL and Fast with “PowerSnooze”—an additional power-saving Deep Sleep mode that achieves 15 µA (max) deep-sleep current for the 4 Mb SRAM. Each of the options is offered in industry standard x8 and x16 configurations. The devices operate at multiple voltages (1.8V, 3V, and 5V) over -40°C to +85°C (Industrial) and -40°C to +125°C (Automotive-E) temperature ranges.

These SRAMs are currently sampling in industrial temperature grade, with production expected in July 2015. These devices will be available in RoHS-compliant 32-pin SOIC, 32-pin TSOP II, 36-pin SOJ, 44-pin SOJ, 44-pin TSOP II and 48-ball VFBGA packages.

Cypress; www.cypress.com