In conventional three pin TO-247 packages, says Toshiba, parasitic induction at the source pin causes increased losses with increasing switching frequency. With this TO-247 4L package an additional source signal terminal is separated as a ‘Kelvin source’. By using this source pin, di/dt and switching efficiency can be increased. Compared to a three pin solution, the switching loss E(on) will be reduced by about 15% in the four-pin solution .
DTMOS IV-H chips are made using Toshiba’s Deep Trench technology that delivers lower ON resistance at higher temperatures, compared to conventional super-junction MOSFETs. It also offers reduced turn-off switching losses (E OSS) than previous technology generations. The combination of smaller increases in R DS(ON) at high temperatures and reduced E OSS provides higher efficiency for power supplies and assists designers in minimising system size.
The four-pin TO-247 packaging style will initially be seen on four members of the DTMOS IV-H range, the TK25Z60X, TK31Z60X, TK39Z60X and TK62Z60X all of which feature V DSS of 600V with R DS(ON) values of 125 down to 40 mOhm.
Toshiba Electronics Europe; www.toshiba.semicon-storage.com