Despite its affordability, the AMC-V6L incorporates a high performance Xilinx Virtex-6 FPGA. The standard build is a cost-effective, high density LX75T-2 version of the FPGA, with other options available for custom order up to the LX240T variant.
The module includes 256 Mbytes of 16-bit DDR3 SDRAM memory. 128 Mbytes of Flash memory is also provided, which can be used as storage for multiple FPGA configurations and additional software.
A comprehensive range of high speed, flexible I/O is provided. The module supports dual Gigabit Ethernet to the backplane, for industry standard control links. It also provides ‘fat pipe’ connections directly from the AMC backplane on ports 4-7 and 8-11 to the FPGA, which can support PCI Express (with build option), SRIO, XAUI or even CPRI, at up to 20 Gbaud per link.
Front panel I/O is supported by two SFP+ interfaces that provide flexible, high-speed optical or electrical links at up to 6.25 Gbaud. These interfaces can be configured as CPRI, OBSAI, GigE, SRIO or other standards. Two mezzanine sites are also provided, each with 17 GPIO lines and 20 LVDS pairs, which may be fitted with add-on modules for additional specialised front panel I/O.
Timing and synchronisation is provided via the front panel or backplane clock I/O. A GPS receiver is available as an option, in which case no additional timing equipment is required, significantly reducing system complexity for wireless applications.
The is a compact mid-size, single width PICMG AMC.0 R2.0 Advanced Mezzanine Card (AMC), and is suitable for use in both ATCA carriers and MicroTCA chassis. It can also operate standalone, with suitable power and cooling. A range of build options is available, and further customisation is possible in volume.