Many of the upgrades in the new product lines – actual release dates for the two series of parts are not yet announced – are enabled by process changes. Arria 10 devices will – initially – be built in TSMC's 20-nm planar transistor technology; Stratix 10 FPGAs and SoCs will use Intel’s 14 nm Tri-Gate process (Intel's term for fin-fets) and an enhanced architecture.
Among the architectural changes are that, previously, Altera only included embedded processor cores in what it terms low- and mid-range programmable devices. Now, they will become available in high-end parts.
With recent generations of product, Altera says it has been able to keep advancing density figures, but progress in power/performance has slowed, for process reasons: now, the company says it has “broken out” of that limitation and is able to advance on both fronts. Stratic 10 will give you (relative to current Stratix parts) the same performance for 30% of the power: or twice the performance for 30% more power: or 40-60% more performance for today's power levels. These trade-offs are based parameters you can set as a user, on a single device part number.
to deliver core performance two times higher than current high-end FPGAs, while enabling up to 70 percent power savings. Stratix 10 devices will run at up to 1 GHz clock speeds; they will also include transceivers that will signal (over very short distances, such as between die on a substrate, or between adjacent chips) at 56 Gbit/sec. Referring to these speeds, an Altera spokesman acknowledges, “That's it: after this [anything faster] will have to be optical”. Stratix 10 chips will also offer over 10-times the DSP performance, with over 10 TeraFlops, of prior chips. They will include a “hard” processor core; the company will not say what it will be, but notes that, “Our agreement with Intel would allow us to build ARM cores on its [Intel's] 14-nm TriGate process, “