Altera verifies FPGA Interlaken connectivity with Cavium multicore processors

July 31, 2013 // By EDN
Aiming at designers of next-generation network platforms, Altera has announced the interoperability of its Interlaken intellectual property (IP) core on Stratix V FPGAs with Cavium’s OCTEON multicore processors, ensuring chip-to-chip connectivity.

The Altera Interlaken IP core provides high throughput and performance, with features including; • More than 20 parameters and settings provide the needed flexibility for system performance tuning, scalability and interoperability

- Data rate and lane support up to 12.5G and x24 lanes

- Standard and customised Interlaken IP cores

- Fully integrated IP deliverable, includes MAC, PCS, and PMA layers

- Interlaken Protocol Definition v1.2 compliant

The Altera Interlaken IP core is intended for multi-terabit routers and switches for access, carrier Ethernet and data centre applications that demand IP configurability to optimise for various traffic profiles, and scalability for next-generation platforms. The Interlaken IP includes Altera’s transceivers (PMA), PCS, and MAC layers. The PCS layer is hardened within the Stratix V and Arria V FPGAs, thereby saving customers 30 to 50% on FPGA logic resources. In addition to resource savings, the Interlaken IP has been through extensive simulation verification and has been proven to work on internal and customer platforms. “The flexibility of our Interlaken IP core makes Altera FPGAs instantly usable with the variety of SoC, ASSP and ASIC device interfaces in the market,” said Alex Grbic, director of product marketing at Altera. “Demonstrating interoperability with Cavium OCTEON devices shows both the quality of our Interlaken IP and our commitment to proving out solutions.”

“Altera’s flexible Interlaken IP enabled us to quickly show interoperability between our products,” said John Bromhead, director, Solutions and Services at Cavium. “This solution gives our customers the added assurance that when they develop with Altera FPGAs and Cavium’s OCTEON processors, the devices will work seamlessly together. ”