AMD renews R series embedded APUs with HSA designs

May 20, 2014 // By Graham Prophet
AMD has introduced a second generation of its “R” series APU (combined CPU and graphics processing unit) for the embedded market, in 28-nm technology and with an implementation of the HSA (hetergeneous system architecture) to increase processing throughput.

AMD is looking to the embedded space for growth, and it focusses on a number of distinct embedded sectors; digital signage, medical imaging, gaming, thin clients, networking – and industrial controls/automation. This R-series introduction targets, in particular, the gaming sector along with industrial automation, and medical imaging.

The HSA aims to “unlock the GPU for embedded computing”. The many-core structure of the GPU has been available to embedded designers for some time, using the “GPGPU” approach – general purpose [computing using] the GPU. Previously, the GPU operated as a slave to the CPU, with tasks – that the programmer identified as having parallel attributes – for the GPU queued for it by the CPU, and each has its own memory space. In the HSA implementation the two cores have equal status, and can work together in a shared memory space. “Multiple compute tasks can work on the same coherent memory regions, utilizing barriers and atomic memory operations as needed to maintain data synchronization (just as multi-core CPUs do today),” - as AMD puts it. The program flow can move tasks – parallel or serial – to the most appropriate processing element, and the task does not have to move from memory space to memory space.


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