ARM extends scalability of CoreLink for infrastructure computing

October 23, 2014 // By Graham Prophet
ARM has announced additions to its enterprise-class CoreLink Cache Coherent Network (CCN) SoC interconnects, supporting its commitment to providing a flexible architecture from sensors to servers. The CoreLink CCN-502 and CoreLink CCN-512 interconnects extend the current family for data centre and infrastructure equipment that scales from the edge of the network to the core.

The way the network is being built is changing, ARM observes; different servers, with different compute models, populate different points in the network: but ARM believes that a single, scalable architecture can serve across the hierarchy. ARM has drawn on its experience in the mobile sector, particularly to apply low-power principles to these on-die interconnect IP introductions; there are now no applications that are not low-power-sensitive.

“Growth in mobile computing and the Internet of Things is connecting more devices and aggregating more data across the network, and that demands an increasingly flexible and efficient computing infrastructure,” said James McNiven, general manager, systems and software group, ARM. “Our new CoreLink CCN-502 and CoreLink CCN-512 interconnects build on a common architecture, scaling from high efficiency Power-over-Ethernet wireless access points, to high compute density 48-core solutions.”

The CCN-502 represents an extension of the offering at the lower end of the range, and the -512 at the high end; the former is focussed on the smallest footprint (on silicon) while the latter, on serving the highest network compute structures. ARM says it has seen, “over 32” A-57 class cores on a design, with 48 cores a possibility. The entire family of CoreLink CCN interconnects, including the CoreLink CCN-504 and CoreLink CCN-508, offer enterprise-class features such as RAS, ECC and advanced QoS to address a wide range of infrastructure SoCs ranging from 1 to 48-cores of CPU that can be coupled with a variety of heterogeneous compute elements. All CoreLink CCN interconnects include native ARM AMBA 5 CHI interfaces providing high frequency, non-blocking data transfers and an integrated Level 3 Cache and Snoop Filter.

CoreLink CCN-502 is an area-optimized interconnect for up to four quad-core processor clusters, offering the most cost and power-efficient solution in the CoreLink CCN family. Applications include small cell base stations and sub-10W Power-over-Ethernet wireless access points.

next; 502 and 512 benefits...