The smaller Cortex A53 and the larger high performance A57 can be built in 28nm and 20nm processes as well as the coming 16nm FinFET technologies. Test chips for 16nm FinFets will sample next year, says Noel Hurley, vice president of marketing and strategy at ARM, and foundry partners include TSMC, IBM, GlobalFoundries and UMC.
The implementation of the v8A architecture of the A53 means it is 40% smaller than the current A9 core on the same process. The intention is that this would sit next to one or several A57 cores that provide 3x the performance of today’s A9 in a big.little design in a phone or tablet.
The A53 is an in-order execution, single thread engine optimised for size. The A57 is an out-of-order execution engine, again single thread, with a four data wide SIMD engine. The execution chain has been optimised for today's software, for example replacing the bank of 33 registers with a single array of 31, which gives compilers more options and simplifies the silicon design.
“What we are doing with the A50 family is producing big.little first,” said Hurley. “This will allow us to add a very wide range of applications, from a dual or quad A53 in a smartphone to a tablet with dual A57’s alongside the A53s to give a performance boost when you need it.”
Both are supported by the new ARM CoreLink 500 series cache coherent network IP fabric. Licensees of the new processor series include AMD, Broadcom, Calxeda, HiSilicon, Samsung and STMicroelectronics.
“Consumers expect a personalized mobile experience, integrating their daily lives, with seamless connectivity providing access to vast amounts of information. The ARM ecosystem will continue its rate of unprecedented innovation to enable diverse platforms. This will deliver an era of transformational computing, from mobile through to the infrastructure and servers that support consumers’ connected, mobile lifestyles. This will create massive opportunities for market expansion and a revolution