Automotive SoCs targeted by qualified IP from Synopsys

June 09, 2015 // By Graham Prophet
Synopsys’ DesignWare IP portfolio includes function to meet key automotive functional safety requirements and is being further enhanced with availability of ASIL B ready IP, and investment in AEC-Q100 testing and TS 16949 quality management

Synopsys’ latest IP announcement is aimed at designers of automotive SoCs; there is a portfolio of IP for automotive applications I the DesignWare series that includes Ethernet Audio Video Bridging (AVB), LPDDR4, MIPI CSI-2 and DSI, HDMI, PCI Express, USB, Mobile Storage, Logic Libraries, Embedded Memories, Non Volatile Memories (NVM), Data Converters, Synopsys ARC EM processors with Safety Enhancement Package (SEP), EV vision processors and the Sensor and Control IP Subsystem. The DesignWare IP portfolio meets key automotive functional safety requirements today and is being further enhanced to address AEC-Q100 and TS 16949 requirements. Designers can, says Synopsys, accelerate their functional safety assessments and meet the high quality levels required in automotive applications such as advanced driver assistance systems (ADAS) and infotainment.

DesignWare Ethernet AVB, LPDDR4 and Embedded Memory IP are now certified to be ASIL B Ready for ISO 26262 functional safety, as required by ADAS applications. The ASIL B Ready DesignWare IP is delivered with safety packages that include failure modes effects and diagnostic analysis (FMEDA) reports as well as safety plans and manuals, giving designers the documentation needed to complete their own certification processes. In addition to the ASIL B Ready IP currently available, Synopsys offers ARC EM processors with SEP for safety critical embedded applications and the ASIL D Ready ARC MetaWare Compiler.

In addition to providing ASIL B Ready IP, Synopsys is making investments in IP solutions that are AEC-Q100 tested and meet TS 16949 quality management standards. The AEC-Q100 industry standard specification outlines the stress tests and reference test conditions for the qualification of automotive grade SoCs. By providing IP that is tested against applicable AEC-Q100 specifications, Synopsys is enabling designers to reduce design risk and development time for achieving SoC-level AEC-Q100 qualification. The TS 16949 quality management standard identifies risks in product development processes. By enhancing its IP development processes to fully support TS 16949 documentation requirements, Synopsys is providing the organisation, policies,