Bwave, Ubiso and Tensilica to demonstarte licensable multi-standard DVB-T2 DTV demodulation IP subsystem

February 18, 2013 // By Jean-Pierre Joosting
Tensilica® has announced that Bwave and Ubiso will demonstrate the first licensable multi-standard DVB-T2 demodulation IP subsystem for digital televisions (DTV) based on Tensilica’s ConnX BBE16 DSP (digital signal processor). The subsystem will be demonstrated in at the Mobile World Congress in Barcelona, February 25-28.

Bwave’s engineers defined the system architecture and implemented the subsystem using the ConnX BBE16 DSP and Ubiso’s programmable DVB-x2 forward error correction (FEC) IP. This is a complete reference design platform, ready for chipmakers to drop into their DTV chip designs.

“This complete, turnkey solution will speed adoption of DVB (digital video broadcasting) for broadcasting on cable, satellite and terrestrial networks,” stated Eric Dewannain, Tensilica’s vice president and general manager, baseband business unit. “This demonstration showcases how efficient our ConnX BBE16 DSP is at executing complex algorithms for digital TV demodulation, and how well it pairs with IP from Bwave and Ubiso.”

The low-power ConnX BBE16 DSP is ideal for considering and analyzing multi-standard DTV demodulation scenarios and implementing a universal demodulation engine. It easily interfaces with hardware accelerators, often used in the FEC (forward error correction), and other modules in the demodulator because of its unique direct interfaces that bypass the system bus, thereby speeding data transfers. Designers can easily customize the architecture or modify I/O interfaces, the parameters of the computational units and the memory subsystem using Tensilica’s automated tools. Programming is much easier than with most DSPs because Tensilica supports a C programming model, providing for automatic mapping of C functions, like the demodulation algorithm, to advanced DSP operations.

Ubiso’s DVB-x2 FEC decoder IP enables very flexible implementation of multi-standard receivers for second-generation digital television. It converts demodulated satellite, cable and terrestrial signals into a robust bit stream for use by the video decoder. This includes all de-interleaving, FEC decoding and output processing steps, using optimized resource-sharing and a high performance LDPC decoder architecture.