It is expected that Tensilica dataplane processing units (DPUs) combined with Cadence Design IP will deliver more optimized IP solutions for mobile wireless, network infrastructure, auto infotainment and home applications. More than 200 licensees, including system OEMs and seven of the top 10 semiconductor companies, have shipped over 2 billion Tensilica IP cores. Tensilica had approximately USD30 million of cash as of December 31, 2012.
“With Tensilica, we will be able to provide designers with a more complete SoC solution that will speed the development of innovative and differentiated products, while reducing time to market,” said Lip-Bu Tan, president and chief executive officer of Cadence. “We look forward to working with Tensilica's dedicated employees as one team to bring even more value to our customers.”
Jack Guedj, president and chief executive officer of Tensilica stated, “Joining Cadence will provide a broader platform to expedite our product development strategy and customer engagement. We will have the ability to accelerate IP subsystem development and integration while providing a more extensive support network to our customers.”
Tensilica customized DPUs augment traditional custom hardware design, offering both time-to-market and programmability advantages and can be optimized to achieve optimal power, performance and area efficiency. Tensilica IP provides application-optimized subsystems that work synergistically with industry-standard CPU architectures.
“The acquisition of Tensilica by Cadence will be a positive move for the industry,” said Simon Segars, president of ARM Holdings plc. “We look forward to expanding our ongoing collaboration with Cadence to enable our customers to bring great products to market.” Cadence intends to finance the transaction with available cash and an existing revolving credit facility. The transaction is expected to close in the second quarter of fiscal 2013, subject to customary closing conditions including regulatory approvals.
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