Specifically, the agreement grants both companies rights to manufacture test chips containing Cadence IP and ARM IP and to provide development platforms to customers.
With a full vision of each other's IP, the agreement gives both parties the ability to test IP interoperability in silicon, enabling Cadence and ARM to optimise performance and interoperability within systems on chip (SoCs) while redcucing time to market for their customers.
The IP interoperability agreement covers existing and future ARM Cortex processors, ARM Mali GPUs, ARM CoreLink system IP, ARM Artisan physical IP, and ARM POP IP; Cadence Design IP including cores for PCI Express, MIPI, USB, HDMI, DisplayPort, Ethernet, analog, DDR/LPDDR PHY and multiple other memory and storage protocols.
The idea is to make sure that different IP blocks can talk natively to each other, without adding extra layers or wrappers but instead providing as clean and direct an interface as possible between Cadence and ARMs’ IP blocks.
“We gain about 11% of our revenues from IP and this is one of our fastest growing revenue streams”, according to Craig Cochran, Cadence’s VP of Marketing, “so it made sense to team up with the worldwide number one IP vendor ARM to ensure interoperability for our customers and to reduce their risks during IP integration into SoCs using our tools.”
The Agreement is not exclusive in that sense that ARM could well want to strike a similar deal with competing EDA vendors, and conversely, Cadence is open to other such deals with other IP providers, so it remains to be seen if more such large-scale agreements will be struck or if this new move could entice chip designers to consolidate their tool-flow around Cadence’s offering.
For Cadence’s customers, this IP cross-licensing deal could mean new tool functionalities in the future, such as pre-integrated IP libraries with drag-and-drop proven IP combinations pre-optimised for the most recurrent use-cases.
ARM being able to tape-out SoC-level test chips