Cadence expands ARM-based system verification

March 13, 2014 // By Graham Prophet
Cadence has increased the scope of its Interconnect Workbench solution for ARM CoreLink 400 interconnect IP-based systems to deliver faster performance verification and analysis; Cadence now provides ARM Fast Models combined with the Palladium XP II platform to support ARMv8-based system embedded OS verification.

This expanded solution from Cadence features several enhancements and speeds system design and early software development, with hardware running in emulation, for ARM Cortex-A processor series based systems. Verification IP supporting the ARM AMBA 5 CHI protocol for advanced networking, storage and server systems is now available for simulation and the Palladium XP II platform.

In collaboration with ARM, Cadence is announcing;

• An adaptable interconnect performance characterisation test suite in the Cadence Interconnect Workbench, along with AMBA Designer integration, that delivers a significant speed-up of performance analysis and verification of CoreLink CCI-400 system IP and NIC-400 design tool based systems.

• Expanded and pre-verified support of hardware-accurate OS embedded software verification using the Palladium XP II platform with ARMv8 64-bit Cortex processor family Fast Models, which are now available through Cadence.

• Verification IP supporting AMBA 5 Coherent Hub Interface (CHI) protocol is the same protocol as implemented in the ARM CoreLink CCN-508 system IP and silicon proven CoreLink CCN-504 Cache Coherent Networks as used in enterprise level applications. The new Verification IP runs on all industry simulators, plus Accelerated Verification IP for Palladium XP II platforms.