Chip embedded instruments now automatically generated through JTAG/boundary scan

October 04, 2012 // By Julien Happich
Goepel electronic has developped an Automatic Application Program Generator (AAPG) for the use of Chip embedded Instruments based on its ChipVORX technology.

The new generator is another option within the integrated JTAG/Boundary Scan software platform System Cascon. It enables the automatic generation of complete application scripts for chip embedded test and measurement instruments, e.g. chip-dependent instrument selection, implementation (for FPGA), addressing, configuration and procedural control as well as qualification of the generated data. Additionally, the software is able to generate scripts for graphical control panels in order to support interactive debugging.

The AAPG works on a mission basis and connects the specific instrument information, integrated in a ChipVORX model, with the system-internal data base for structural and functional Unit Under Test (UUT) description. The result of fully automated script generation is based on the company's boundary scan standard language CASLAN (CAScon LANguage). It can be executed with each run-time station in the System Cascon software without further options. Also, Gang applications are supported.

Chip embedded Instruments are permanently integrated or temporarily implemented test and measurement functions in an integrated circuit. They are part of the so called Embedded System Access (ESA) technologies, featuring methods such as boundary scan, processor emulation test, in-system programming or core assisted programming.

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