Cortus FPGA board supports development with independent 32-bit processor IP

June 03, 2015 // By Julien Happich
Cortus is offering a development platform for its APS processor cores in the shape of a Xilinx Spartan-6X75-based board, shipping together with the Cortus Eclipse IDE and Cortus GCC toolchain.

The board includes an I/O footprint compatible with the Arduino Due enabling the wide choice of Arduino Due-compatible shields to be used to extend the platform.

The Cortus FPGA board includes 1 Mbyte synchronous SRAM as well as a 32 Mbit SPI flash memory. The flash memory holds the FPGA configuration and can also be shared to hold the application software. A 10/100 Mbits/sec Ethernet transceiver PHY is connected directly to the FPGA and is fully compatible with the Cortus 10/100 Ethernet MAC IP block.

A USB interface provides a JTAG interface fully compatible with Cortus development tools under Windows and Linux. Additional I/O connectors enable the DDR2 memory to be up to 512 Mbytes.

With an APS23 requiring 19% utilisation and APS25 requiring 29% utilisation the Cortus platform provides capacity for all APS cores. The capacity of the Spartan-6 X75 is sufficient to allow multi-core systems to be emulated on the FPGA board.

The ability to extend the memory can be used to include a USB 2.0 PHY in combination with a Cortus USB 2.0 controller in order to create a prototyping platform for embedded Linux systems. The platform can incorporate IDEs from Cortus' partners as an alternative to Cortus Eclipse.

Cortus;  www.cortus.com