With the increasing use of Ethernet in industrial control, machine vision, defence and the medical sector, the ZestETM1 can speed the time to market for many companies, creating a key advantage, the company says.
With the proprietary protocol chip GigExpedite handling the whole TCP/IP stack at over 100 MBytes/sec in each direction, and the module measuring 25 x 30mm, it allows the user's embedded processor or FPGA to be dedicated entirely to the application for maximum efficiency.
TCP/IP at Gigabit speed consumes considerable processing power, and using a separate dedicated TCP/IP engine frees up the embedded processor or FPGA for the application’s function. The added benefit of this is that a smaller and lower cost processor can be used for the main application.
Orange Tree based the design of GigExpedite on the TCP/IP engine of its ZestET1, following feedback from customers who wanted to use their own embedded processor instead of the FPGA on ZestET1. The ZestETM1 offers application designers and companies a simple ready-to-go high speed Ethernet data interface solution, saving the complexity of dealing with TCP/IP or creating their own Ethernet interface.
The ZestETM1 interface can be configured to one of four modes: 8 or 16-bit SRAM-style bus, FIFO, or “bit banging”. The SRAM-style bus modes are similar to an SRAM interface with the application writing and reading ZestETM1. The FIFO mode has two separate 8-bit channels streaming in each direction to and from ZestETM1. The “bit-banging” mode enables another device on the network to write or read up to 32-bit values to or from an attached device.
There is also a low speed serial interface, which can be configured as either an SPI slave or a UART. This allows a low performance processor to control ZestETM1 while the high speed data interface is connected to the application data path such as FPGA, ADC, DAC or bus transceivers. A separate SPI master interface can be used, for example