The AD9128’s high-speed serial interface greatly simplifies and improves the data connection between the DAC and the FPGA in a typical system implementation.
High-performance FPGAs are increasingly being utilized as processors in many data-centric wireless and wired communications, radar, avionics, and medical imaging applications. FPGAs are gaining favor due to their inherent advantages of easier system development, reduced time-to-market, higher processing speed, and on-the-fly programmability. However for higher-resolution, 1-GSPS+ data converter applications, data transfers in and out of an FPGA have traditionally been a design bottleneck because of interface bit-rate limitations, interconnect layout complexity, and parallel interface board space requirements.
JESD204 was specifically developed to remedy these constraints by defining a robust high-speed serial interface that is scalable and accommodates data rates in the multiple Gbps range. ADI is committed to embracing this standard in its ultra-high-speed data-converter technology, and FPGA manufacturers are actively integrating this protocol into their high-performance platforms.
The JESD204A-compliant AD9128 offers high sampling rate and high dynamic range, enabling multicarrier generation up to the Nyquist frequency, and includes features such as an on-chip 32-bit NCO (numerically-controlled oscillator), allowing flexible placement of the IF (intermediate frequency), complex digital modulation, and gain and offset compensation. A 4-wire serial port interface provides for programming and read-back of many of the device’s internal parameters and functions. The AD9128 supports GSM, WCDMA, TD-SCDMA, CDMA2000, WiMAX, and LTE wireless communications standards.