Emulation system reaches 15 billion gate capacity

February 17, 2017 // By Graham Prophet
Mentor Graphics' Veloce Strato emulation platform is Mentor’s third generation “data-centre friendly” emulation platform, presented as the only emulation platform with full scalability across both software and hardware. As part of the announcement, Mentor is launching the Veloce StratoM high-capacity emulator and Veloce Strato OS enterprise-level operating system.

 

The Veloce StratoM, which is currently on site at major customers, reaches 2.5BG capacity when fully loaded, and with Veloce Strato link, total capacity is increased based on number of connected emulators. The Veloce StratoM has available slots for 64 Advanced Verification Boards (AVBs) and fully loaded consumes up to 50 kW (22.7 W/Mgate). Other performance improvements include: total throughput up to 5X (fastest compile-runtime-debug sequence), time to visibility up to 10X (fastest time to debug), compilation time up to 3X (with 100% success rate) and co-model bandwidth up to 3X (fastest virtual co-model solution available).

 

The Veloce Strato OS enterprise-level operating system forms the foundation for a common infrastructure for all Veloce Strato hardware and software applications. The Veloce Strato OS is hardware-platform independent so that Veloce Apps and Protocol Solutions are interchangeable between hardware platforms. This includes Veloce Apps such as the Veloce Power App, Veloce DFT App and Protocol Solutions such as Veloce VirtuaLAB (virtual peripherals), iSolve (physical peripherals) and soft models. The modular Veloce Strato OS is architected to serve as a common front-end for a full range of solutions spanning verification through prototyping and validation.

 

The Veloce emulation platform software runs on powerful, qualified hardware and an extensible operating system, to target design risks faster than hardware-centric strategies. Emulation, says Mentor, greatly expands the ability of project teams to do hardware debugging, hardware/software co-verification or integration, system-level prototyping, low-power verification and power estimation and performance characterization.

 

Mentor Graphics; www.mentor.com