FPGA-based SoC verification challenges

June 22, 2012 // By Ian Gibbins
As FPGA designs become increasingly complex, a clear synergy emerges with that of the ASIC (design) world and, more specifically, creating a System-on Chip (SoC).

For example, consider Xilinx's recently announced Zynq-7000 Extensible Processing Platform (EPP). It features an ARM dual-core Cortex-A9 MPCore which has numerous peripherals including memory controllers, CAN , USB, Tri-mode Gigabit Ethernet, SD-SDIO, UARTs and ADC s. Xilinx boasts though that the real advantage (over say a two-chip processor and FPGA solution) is the nine-AXI interfaces and control signals (e.g. DMA and interrupts) between the ARM core and the programmable logic fabric (itself a considerable amount of 'FPGA white space’).

Read the full article on page 32 of our June digital edition.