Lattice Semiconductor has developed three reference designs that will, the company says, make it easier for electronic OEMs to deliver media-rich experiences to their end users by taking advantage of low-cost, industry-standard MIPI (Mobile Industry Processor Interface) camera, application processor, and display technologies. With these FPGA-based reference designs you can use image sensors that are not designed for the mobile market. As an example, a high end smartphone could incorporate a DSLR type camera. In this case, the image sensor is bridged to a MIPI-based applications processor via a Lattice FPGA. The inverse is also true where MIPI-based components can be linked to non-MIPI based processors or SoCs.
“Increasingly, for OEMs to be competitive they need to provide end-users with a media-rich experience across all their electronic devices. To deliver on this, manufacturers would like to leverage mobile display, applications processor, or camera components, but the interfaces for these low cost system components often present a challenge,” said Ted Marena, Director of Solutions Marketing at Lattice. “The fact is, until MIPI becomes the dominant interface for the broad market, customers are going to need a bridge between different interface technologies. Not only does Lattice provide the perfect FPGA technology to adapt to different interfaces, now we provide complete reference designs that make adding MIPI to any system an easy to achieve reality.”
Each of the three new reference designs, as well as the previously announced CSI-2 receive bridge, includes a configuration form available on the Lattice web site that allows designers to specify the interfaces they need and receive an HDL netlist targeting a MachXO2 or LatticeECP3 FPGA.
MIPI DSI Transmit Bridge : Enables a Lattice FPGA to drive a DSI-receiving device such as a DSI display.
MIPI DSI Receive Bridge : Allows an application processor to interface to a screen that is not designed for mobile applications.
MIPI CSI-2 Transmit Bridge : Provides the conversion bridge logic required to