Functional safety package combines FPGA with “Lockstep” processor

November 24, 2015 // By Julien Happich
Altera's Functional Safety Lockstep solution for the Nios II embedded processor is aimed at reducing risk in design cycles and helping system designers simplify certification for industrial and automotive safety applications.

The joint Altera and Yogitech lockstep solution is built using Altera FPGAs, SoCs, and certified tool flows, along with intellectual property (IP) cores from Yogitech. This solution enables customers to easily implement SIL3 safety designs in Altera FPGAs, including the low-cost Cyclone V FPGA and MAX 10 FPGA families.
The lockstep solution leverages Yogitech’s fRSmartComp technology to provide high diagnostic coverage, self-checking and advanced diagnostic features for safety-related integrated circuits, in full compliance with functional safety standards IEC 61508 and ISO 26262.
The fRSmartComp technology, which is used in conjunction with Altera’s flexible Nios II embedded processors, provides diagnostic coverage greater than 99 percent without the need for difficult-to-develop ad hoc tests, speeding time-to-market.

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