Future Horizons' Forum: sub-20-nm, graphene, IP for SoCs, lifesciences – and, how's Moore's Law doing?

September 25, 2013 // By Graham Prophet
Semiconductor and Electronics industry analysts Future Horizons has released previews of some of the key presentations at its imminent, 2013 running of its Annual International Electronics Industry Forum. The 22nd time the event has been held, this time it takes place on 2-4 October 2013 at the Crowne Plaza Hotel, Blanchardstown, Dublin, Ireland.

The speaker lineup includes representatives from the highest level of the semiconductor industry, product and application developers, and from research and academia. Topics range from new materials, challenges in design methodologies, new applications domains, and possible changes to the business model. Subjects as diverse as doing business in Russia and Africa, to modelling the human brain will be addressed, in addition to the stock-in-trade subjects of the semiconductor world: how to carry the momentum of the industry onwards throught 20-nm 'barrier'. The following paragraphs give an idea of the diversity of the programme – the complete speaker list appears below and registration is here 

Liam Britnell, European Manager & Research Scientist Bluestone Global Technology Materials, titles his address; “ Beyond Graphene: Heterostructures & Other Two-Dimensional Materials ”. For graphene, the transition from the laboratory to factory has hit some challenging obstacles. This talk will review the current state of graphene research, focusing on the techniques which allow large scale production, and moving on to research on more complex structures beyond graphene. The talk will conclude by speculating [on] the fields where graphene may realistically find applications and discuss the role of the National Graphene Institute in commercializing graphene.

Addressing one of the key challenges facing silicon technology, Jean-Rene Lequepeys, VP Silicon Components at CEA-Leti, will present “ Advanced Semiconductor Technologies Enabling High-Performance & Energy Efficient Computing”. The key challenge for future high-end computing chips is energy efficiency in addition to traditional challenges such as yield/cost, static power, data transfer …. In 2020, in order to maintain at an acceptable level the overall power consumption of all the computing systems, a gain in term of power efficiency of 1000 will be required. Lequepeys looks to new partnerships between Semiconductor Industry (IDM, Foundry), IP provider, EDA provider , Design house, Systems and Software Industries for a solution.

Looking to a potential growth area in the applications space, Subramanian (Ram) Ramamoorthy, of Edinburgh